/kicad-schematic

name: kicad-schematic
description: |
  Workflow skill for KiCAD schematic design via MCP tools. Triggers on: "design a circuit",
  "add a component", "wire up", "connect pins", "build schematic", "place resistor",
  "place cap", "place IC", "schematic", "add symbol", "net label", "power rail".
argument-hint: "[circuit description or task]"

KiCAD Schematic Design Workflow

This skill guides Claude to design schematics using Konnect MCP tools. ALL modifications go through MCP tools — never edit .kicad_sch files directly.

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Toolset Loading

Before any schematic work, load the required toolsets:

load_toolset('sch_components')   # place, move, rotate, delete symbols
load_toolset('sch_wiring')       # wires, net labels, power symbols, connections
load_toolset('sch_analysis')     # connection validation, short and orphan checks
load_toolset('sch_export')       # direct ERC and rendered schematic evidence
load_toolset('project')          # save_project before formal checks

Load additional toolsets as needed:

load_toolset('library')          # search_symbols, get_symbol_info, list_symbol_libraries
load_toolset('sch_batch')        # batch operations for 3+ items

Always call `get_active_toolsets()` first to see what is already loaded.

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Component Placement

Read [`references/common-lib-ids.md`](references/common-lib-ids.md) when choosing a common generic KiCad symbol. It is a quick-start index, not an allowlist; search the active libraries when the required part is absent or package-specific.

Workflow

1. Search the library first: use `search_symbols` to find the correct lib_id 2. Get pin info: use `get_symbol_info` to see pin names, numbers, and positions 3. Place on the 1.27mm grid (KiCAD default schematic grid) 4. Verify placement with `list_schematic_components`

Package-sensitive and custom parts

Before placing or wiring a custom symbol, a manufacturer-specific discrete, or any package whose view can be mirrored, require the `kicad-library` skill's **accepted physical pin map** for the exact MPN and package suffix. The map must join each datasheet lead to the symbol pin and footprint pad, identify the drawing view/direction, reconcile duplicate and mechanical pads, and include query-back plus disposable rendered inspection. `get_symbol_info` proves the library data that exists; it does not prove that data matches the package.

If the accepted physical pin map is missing, incomplete, based on a different suffix, or ambiguous about top/bottom/mating view, stop before real schematic placement. Do not infer physical numbering from a generic symbol name or from the order pins appear on screen.

Common Library IDs

| Component | lib_id | |-----------------|--------------------------------| | Resistor | `Device:R` | | Capacitor | `Device:C` | | Capacitor Polar | `Device:C_Polarized` | | Inductor | `Device:L` | | LED | `Device:LED` | | Diode | `Device:D` | | Zener | `Device:D_Zener` | | NPN Transistor | `Transistor_BJT:Q_NPN_BEC` | | PNP Transistor | `Transistor_BJT:Q_PNP_BEC` | | N-MOSFET | `Transistor_FET:Q_NMOS_GDS` | | P-MOSFET | `Transistor_FET:Q_PMOS_GDS` | | 2-pin Connector | `Connector_Generic:Conn_01x02` | | 4-pin Connector | `Connector_Generic:Conn_01x04` | | Ground | `power:GND` | | +3.3V | `power:+3V3` | | +5V | `power:+5V` | | VCC | `power:VCC` | | VDD | `power:VDD` |

Rotation Conventions

• 0 degrees: default orientation (pins left/right)
• 90 degrees: rotated CCW (useful for vertical components)
• 180 degrees: flipped horizontally
• 270 degrees: rotated CW

Power symbols: GND uses 0 (arrow points down), VCC/VDD/+3V3/+5V use 0 (arrow points up).

Spacing Guidelines

• Between ICs: 30-50mm horizontal, 20-30mm vertical
• Between passive components: 10-15mm
• Between a decoupling cap and its IC: 5-10mm
• Leave room for wiring: minimum 5mm between component pins and other elements

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Wiring

Read [`references/wiring-patterns.md`](references/wiring-patterns.md) when choosing between direct wires and labels or when building one of its common subcircuits. Verify every named pin against the placed symbol before applying a pattern.

Connection Methods — Decision Table

| Scenario | Method | Why | |-----------------------------------------|-------------------------|------------------------------------------| | Two pins physically close (<30mm) | `connect_pins` | Direct wire, auto-routed | | Named signal (SDA, MOSI, EN, etc.) | `connect_to_net` | Stub wire + net label, cleaner | | Power rail (VCC, GND, +3V3) | `add_power_symbol` | Proper power symbol, global net | | Bus signals (D0-D7) | `connect_to_net` | Net labels with bus naming | | Cross-sheet signal | Global label | Connects across schematic sheets | | Multiple pins to same net (3+) | `batch_connect_to_net` | Efficient bulk operation |

connect_pins

Use for direct pin-to-pin connections. The tool auto-routes with L-bends.

connect_pins(schematic, ref1, pin1, ref2, pin2)

• Specify pins by pin number (from get_schematic_pin_locations)
• Works best when pins are nearby and facing each other
• Automatically creates wire segments with proper bends

connect_to_net

Use for named nets. Creates a short stub wire and attaches a net label.

connect_to_net(schematic, reference, pin_number, net)

• Preferred fo