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/kicad-review

Design review and validation workflow for KiCAD projects via MCP tools. Triggers on: "review my design", "check for errors", "audit", "DRC", "ERC", "find problems", "design review", "is this ready", "validate", "check my schematic", "check my PCB", "what's wrong", "run checks",

From plugin
konnect
2276 skills2 agents
Install
$ npx -y skills add mixelpixx/Konnect --skill kicad-review --agent claude-code

How it fires

How this skill gets triggered: by you, by Claude, or both.

  • Fires itselfAuto-invocation. Claude auto-loads it when your prompt matches the work.Auto-invocation is when the right skill fires by itself at the right moment, driven by a FLOW.md router and a hook, instead of you invoking it by name. It is the difference between a skill being installed and a skill actually getting used.Read the full definition →
  • You can call itInvoke it directly when you want it.
  • Slash command/kicad-review

Context preview

The summary Claude sees to decide when to auto-load this skill.

Design review and validation workflow for KiCAD projects via MCP tools. Triggers on: "review my design", "check for errors", "audit", "DRC", "ERC", "find problems", "design review", "is this ready", "validate", "check my schematic", "check my PCB", "what's wrong", "run checks",

SKILL.md

kicad-review.SKILL.md
name: kicad-review
description: |
  Design review and validation workflow for KiCAD projects via MCP tools. Triggers on: "review my design",
  "check for errors", "audit", "DRC", "ERC", "find problems", "design review", "is this ready",
  "validate", "check my schematic", "check my PCB", "what's wrong", "run checks", "pre-fab review".
argument-hint: "[what to review]"

KiCAD Design Review & Validation Workflow

This skill guides Claude through systematic design review of a KiCAD project using MCP tools. ALL checks are performed through MCP tools — never parse .kicad_sch or .kicad_pcb files directly.

---

Toolset Loading

Load the required toolsets for design review:

load_toolset('sch_analysis')     # find_orphan_items, find_shorted_nets, find_single_pin_nets
load_toolset('verification')     # run_drc, check_clearance, get_design_rules
load_toolset('sch_export')       # run_erc
load_toolset('pcb_export')       # get_drc_violations
load_toolset('manufacturing')    # validate_for_manufacturing
load_toolset('design_review')    # audit_decoupling, audit_connections, audit_power_rails, etc.

Optional (for deeper analysis):

load_toolset('sch_analysis')     # get net info, trace connections, inspect components
load_toolset('pcb_routing')      # query_traces, get_nets_list

Always call `get_active_toolsets()` first to see what is already loaded.

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Quick Checks (Escalating Severity)

Run these first — they are fast and catch the most critical issues.

Level 1: Structural Integrity

find_orphan_items()

Finds floating wires, labels, and symbols not connected to anything. These are almost always bugs (leftover from edits or incomplete wiring).

Level 2: Critical Net Issues

find_shorted_nets()

Detects nets that are connected together but should not be. A shorted net means:

  • Two different net labels on the same wire
  • Power rails bridged unintentionally
  • Signal nets merged by accident

**This is always a critical error. Fix before proceeding.**

Level 3: Suspicious Connections

find_single_pin_nets()

A net with only one pin connected is almost always a mistake:

  • Incomplete wiring (forgot to connect the other end)
  • Orphan net labels (typo in name, so it does not match)
  • Leftover stubs from deleted components

---

Formal Checks

ERC — Electrical Rules Check

run_erc()

Checks schematic-level rules:

  • Pin type conflicts (output driving output, unconnected inputs)
  • Power pin connections
  • Missing no-connect flags
  • Duplicate reference designators
  • Missing net connections

Review each violation. Some can be waived (e.g., intentional unconnected pins marked with no-connect flag).

DRC — Design Rules Check

get_drc_violations()

Checks PCB-level rules:

  • Clearance violations (copper-to-copper, copper-to-edge)
  • Minimum trace width violations
  • Minimum drill size violations
  • Unrouted connections (incomplete routing)
  • Zone fill issues
  • Courtyard overlaps

**Every DRC error must be resolved or explicitly justified before manufacturing.**

---

Design Audits

These go beyond rule checking — they evaluate design quality and best practices.

Decoupling Audit

audit_decoupling()

Checks:

  • Every IC power pin has a bypass capacitor
  • Capacitor is placed close to the pin (PCB proximity)
  • Appropriate capacitor values (100nF ceramic minimum)
  • Bulk capacitance present for high-current ICs

Connection Audit

audit_connections()

Checks:

  • All expected connections are made
  • No nets with unexpected fan-out
  • Signal integrity basics (termination on long traces)
  • Pull-up/pull-down resistors where required (I2C, reset pins, enable pins)

Power Rail Audit

audit_power_rails()

Checks:

  • All power rails have proper source (regulator, connector, etc.)
  • Current capacity matches expected load
  • Voltage levels are consistent (no 3.3V device on 5V rail)
  • Power sequencing considered for multi-rail designs
  • Power flags present (avoids ERC false positives)

Manufacturing Audit

audit_manufacturing()

Checks:

  • All footprints are fab-house compatible
  • Pad sizes meet minimum requirements
  • Silkscreen readability
  • Test point accessibility
  • Fiducial marks present (for SMT assembly)
  • Mechanical clearances around mounting holes

---

Full Review Shortcut

run_design_review()

Runs ALL audits and checks in sequence, producing a consolidated report. Use this for a comprehensive pre-manufacturing review.

Equivalent to running: 1. find_orphan_items 2. find_shorted_nets 3. find_single_pin_nets 4. run_erc 5. get_drc_violations 6. audit_decoupling 7. audit_connections 8. audit_power_rails 9. audit_manufacturing

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Severity Classification

CRITICAL — Must fix before manufacturing

| Finding | Why Critical | |------------------------------------|-------------------------------------------------| | Shorted nets | Short circuit on the board, may damage components | | Missing ground connection | Circuit will not function | | Reversed polarity on power IC | Immediate destruction on power-up | | Unrouted nets | Missing connections on fabricated board | | DRC clearance violation | May cause electrical short on fab board | | Power pin unconnected | IC will not operate | | Wrong voltage on IC power pin | Exceeds absolute maximum, destroys part |

WARNING — Should fix, design risk

| Finding | Why a Warning | |------------------------------------|-------------------------------------------------| | Missing decoupling capacitor | Noise susceptibility, possible oscillation | | No test points on key signals | Cannot debug in production

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Ships withkonnect

AI-assisted PCB design for KiCAD 10. Konnect is a native KiCAD plugin — a single Rust binary — that lets Claude and other AI assistants design schematics and PCBs through the Model Context Protocol (MCP). 187 tools across 18 on-demand toolsets.

Get the whole plugin