/embedded-ai-deployment

name: embedded-ai-deployment
description: >
  Deploy AI models to embedded hardware using MathWorks tools (MATLAB, Simulink,
  Embedded Coder). Covers two workflow patterns: (1) MathWorks-native or 3P-imported
  models rebuilt as dlnetwork for lean hardware (Cortex-M, DSP), (2) direct C/C++
  code generation from PyTorch and LiteRT models for high-performance hardware
  (Cortex-A, x86, GPU).
  Trigger when: user wants to deploy AI to embedded targets; generate C/CUDA from
  neural networks; compress AI models for MCU/DSP; integrate AI in Simulink for
  system-level simulation; import PyTorch/ONNX/TensorFlow models for embedded
  deployment; optimize AI for resource-constrained hardware; or use
  loadPyTorchExportedProgram, importNetworkFromPyTorch, dlquantizer,
  exportNetworkToSimulink, or Embedded Coder with AI models.
license: https://www.mathworks.com/content/dam/mathworks/license/pmrl/license.md
metadata:
  author: MathWorks
  version: "1.0"

Embedded AI for Engineered Systems

Deploy AI models to embedded hardware using MATLAB® and Simulink®. This skill is written specifically for **MATLAB R2026a** and uses APIs, functions, and workflows introduced in that release. It covers the complete lifecycle: model creation or import, verification, compression, system-level simulation, and code generation for resource-constrained targets.

Requires MATLAB R2026a or newer. Core toolboxes: Deep Learning Toolbox, Statistics and Machine Learning Toolbox, MATLAB Coder, Embedded Coder, Simulink, and Fixed-Point Designer. Workflow-specific support packages are checked during Environment Discovery. The MATLAB and Simulink Agentic Toolkits must be available so Codex can drive a live MATLAB and Simulink session through MCP tools.

Workflow Pattern Selection

Determine the correct workflow pattern based on model origin and deployment target.

Decision Tree

Primary discriminator for 3P models: **model size + hardware class**.

Q1: What is the deployment target?
 |
 +-- Cortex-M (M33, M4, M7) ---------------------> Q2
 +-- Cortex-A/R processor or DSP (C2000, etc.) ----> Q2
 +-- x86 processor or GPU (Jetson, CUDA) ----------> Q2
      |
      Q2: Where does the AI model come from?
       |
       +-- Train from scratch in MATLAB ------------> Pattern 1  (references/pattern1/workflow.md)
       +-- Pre-trained 3P model --------------------> Q3
            |
            Q3: Route by hardware class + model size
             |
             +-- Cortex-M: always Pattern 1 import
             |     (MathWorks compression, tight sim-codegen agreement)
             |
             +-- x86 / GPU: Pattern 2 if PyTorch or LiteRT
             |     Pattern 1 import if ONNX/TF (convert to Py/LiteRT recommended)
             |
             +-- Cortex-A/R or DSP:
                   +-- Small model (< 500 KB) ---------> Pattern 1 with import path
                   +-- Large model (> 1 MB):
                        +-- PyTorch / LiteRT -----------> Pattern 2
                        +-- ONNX / TensorFlow ----------> Pattern 1 import *

\* Convert to PyTorch® (.pt2) or LiteRT (.tflite) to use Pattern 2 instead.

Pattern Summary

| Pattern | Model Origin | Target Hardware | Primary Toolchain | |---------|-------------|-----------------|-------------------| | **1** | MATLAB-native or 3P imported as dlnetwork | ARM® Cortex®-M (M33, M4, M7), Cortex-A/R, DSP | Embedded Coder™ | | **2** | PyTorch (.pt2) or LiteRT (.tflite) direct code generation | Cortex-A/R, DSP, x86, GPU | MATLAB Coder™ + PyTorch & LiteRT SPKG |

Pattern 1 vs Pattern 2 Capability Comparison

| Capability | Pattern 1 (dlnetwork) | Pattern 2 (PyTorch/LiteRT direct) | |-----------|----------------------|----------------------| | C code generation | Yes | Yes | | Weight inspection / modification | **Yes** | No | | dlquantizer (INT8) | **Yes** | No | | Projection (compressNetworkUsingProjection) | **Yes** | No | | Pruning | **Yes** | No | | Simulink integration | **Yes** (exportNetworkToSimulink) | **Yes** (PyTorch SPKG Simulink blocks) | | Fixed-point codegen | **Yes** | No | | Combined compression (77%+ flash savings) | **Yes** | No | | Speed to first C code | Slower | **Faster** | | Requires native rebuild for 3P models | Yes | No |

**Rule of thumb:** Choose Pattern 1 for small models (< 500 KB) on lean hardware (Cortex-M, DSP) where you need MathWorks compression and tight simulation-codegen agreement. Choose Pattern 2 for larger models (> 1 MB) on high-performance hardware (x86, GPU, Cortex-A) where simulation speed is a priority and compression is done externally in Python. For Cortex-A/R and DSP targets, model size is the primary discriminator. Pattern 2 supports PyTorch (.pt2) and LiteRT (.tflite) formats. Both patterns support Simulink integration.

Common Start: Prerequisites

Regardless of pattern, **always** begin with these two prerequisite steps before entering the pattern-specific phases (which start at Phase 1):

1. **Environment Discovery** (silent): Load [`references/shared/environment-setup.md`](references/shared/environment-setup.md) 2. **Project Discovery** (interactive): Load [`references/shared/project-discovery.md`](references/shared/project-discovery.md)

Project Discovery determines the workflow pattern via the decision tree above.

Banned Legacy Functions

| Legacy (BANNED) | Modern Replacement | |-----------------|-------------------| | `trainNetwork` / `trainnetwork` / `train` (for DL) | `trainnet` | | `DAGNetwork` / `SeriesNetwork` / `network` | `dlnetwork` | | `importONNXNetwork` / `importONNXLayers` | `importNetworkFromONNX` | | `importTensorFlowNetwork` / `importKerasNetwork` | `importNetworkFromTensorFlow` | | `importTensorFlowLayers` / `importKerasLayers` | `importNetworkFromTensorFlow` | | `taylorPrunableNetwork` / `updateScore` / `updatePrunables` | `compressNetworkUsingTaylorPruning` | | `csvread` / `xlsread` | `readmatrix` / `readtable` | | `datenum` | `datet