Code Generation
Command
/gf-pinmap
Generate pin constraint file for target board
Install
> /plugin marketplace add codejunkie99/gateflow-plugin > /plugin install gateflow@gateflow
How it fires
How this command gets triggered: by you, by Claude, or both.
- Fires itselfClaude auto-loads it when your prompt matches the work.
- You can call itInvoke it directly when you want it.
- Slash command
/gf-pinmap
Context preview
What this command does when you run it.
Generate pin constraint file for target board
Command definition
gf-pinmap.mdname: gf-pinmap description: Generate pin constraint file for target board argument-hint: "<board> [peripheral] [connector]" allowed-tools: - Bash - Read - Write - Glob - Grep - WebSearch
GateFlow Pin Mapping Command
Generate FPGA constraint files with correct pin assignments.
Usage
/gf-pinmap arty-a7-35t # Full constraints for board /gf-pinmap arty-a7-35t spi pmod-ja # Map SPI to PMOD JA /gf-pinmap icebreaker uart # Map UART on iCEBreaker
Output
Generates constraint file in correct format:
- Xilinx: `.xdc` with PACKAGE_PIN + IOSTANDARD
- Lattice iCE40: `.pcf` with set_io
- Gowin: `.cst` with IO_LOC
- Lattice ECP5: `.lpf` with LOCATE + IOBUF
Safety: curated database first, web search requires user confirmation.
Ships withgateflow-plugin
AI-powered hardware development platform — design, verify, synthesize, and deploy working RTL with natural language. Supports SystemVerilog, Verilog, and VHDL across the full open-source FPGA toolchain. Loving hardware doesn't have to be gatekept.
Get the whole plugin
Other commands on gateflow-plugin.
Command
Command
Command
Command
gf-demo
One-command demo - generates, lints, and simulates a working project
Command
Command

