custom-allocators
Custom allocator skill for memory allocation strategies. Use when implementing…
Bare-metal SPI and I2C skill for serial peripheral buses. Use when implementing master-mode transfers, register read/write protocols, or debugging bus stalls. Activates on queries about SPI bare-metal, I2C START/STOP, sensor register read, or clock phase/polarity.
$ npx -y skills add mohitmishra786/low-level-dev-skills --skill spi-i2c-baremetal --agent claude-codeHow it fires
How this skill gets triggered: by you, by Claude, or both.
/spi-i2c-baremetalContext preview
The summary Claude sees to decide when to auto-load this skill.
Bare-metal SPI and I2C skill for serial peripheral buses. Use when implementing master-mode transfers, register read/write protocols, or debugging bus stalls. Activates on queries about SPI bare-metal, I2C START/STOP, sensor register read, or clock phase/polarity.
name: spi-i2c-baremetal description: Bare-metal SPI and I2C skill for serial peripheral buses. Use when implementing master-mode transfers, register read/write protocols, or debugging bus stalls. Activates on queries about SPI bare-metal, I2C START/STOP, sensor register read, or clock phase/polarity.
Implement SPI and I2C master drivers for sensor and memory chips: clock configuration, phase/polarity (SPI), START/ACK sequences (I2C), and common register-oriented transaction patterns.
/* Mode 0: CPOL=0, CPHA=0 — check slave datasheet */
SPI1->CR1 = SPI_CR1_MSTR | SPI_CR1_SSM | SPI_CR1_SSI
| (3 << SPI_CR1_BR_Pos); /* baud divider */
SPI1->CR1 |= SPI_CR1_SPE;
uint8_t spi_xfer(SPI_TypeDef *spi, uint8_t tx) {
while (!(spi->SR & SPI_SR_TXE))
;
*(volatile uint8_t *)&spi->DR = tx;
while (!(spi->SR & SPI_SR_RXNE))
;
return *(volatile uint8_t *)&spi->DR;
}CS (GPIO bit-bang):
GPIO_CS_LOW(); spi_xfer(SPI1, reg | 0x80); /* read */ uint8_t val = spi_xfer(SPI1, 0xFF); GPIO_CS_HIGH();
/* START → addr+W → reg → repeated START → addr+R → data → STOP */
bool i2c_read_reg(I2C_TypeDef *i2c, uint8_t dev7, uint8_t reg, uint8_t *out) {
if (!i2c_start(i2c)) return false;
if (!i2c_tx(i2c, (dev7 << 1) | 0)) return false;
if (!i2c_tx(i2c, reg)) return false;
if (!i2c_restart(i2c)) return false;
if (!i2c_tx(i2c, (dev7 << 1) | 1)) return false;
*out = i2c_rx(i2c, false); /* NACK last byte */
i2c_stop(i2c);
return true;
}Poll `SB`, `ADDR`, `TXE`, `RXNE`, `BTF` per reference manual.
| Pattern | Bus | |---------|-----| | `reg + write data` | I2C/SPI | | `0x80|reg` read (MSB set) | SPI sensors | | 16-bit big-endian length prefix | SPI flash |
/spi-i2c-baremetal I2C read of register 0x0F from device 0x68
| Symptom | Cause | Fix | |---------|-------|-----| | I2C NACK | Wrong 7-bit addr (8-bit in datasheet) | Shift addr; check R/W bit | | SPI garbage | CPOL/CPHA mismatch | Match slave mode table | | Bus stuck SCL low | Slave clock stretch / fault | Bus recovery (clock pulses) | | CS glitch | CS timing vs clock | Assert CS before first SCK |
A curated suite of AI agent skills for systems and low-level programming — C/C++, Rust, Zig, GPU, bare-metal firmware, Linux kernel/driver development, computer architecture, compiler internals, HPC, and more.
Repo: mohitmishra786/low-level-dev-skills
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